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| author | Javed Absar <javed.absar@arm.com> | 2017-08-04 17:10:11 +0000 |
|---|---|---|
| committer | Javed Absar <javed.absar@arm.com> | 2017-08-04 17:10:11 +0000 |
| commit | 9cda5991514db77774044816fd7fbf8897300231 (patch) | |
| tree | dbb2be8bf831e53ef95f6145b289a480ad6f5779 /llvm/lib/CodeGen/MachineInstr.cpp | |
| parent | da748f1c3d92f7bd02ee3292f3d9654d4f0f4a45 (diff) | |
| download | llvm-9cda5991514db77774044816fd7fbf8897300231.zip llvm-9cda5991514db77774044816fd7fbf8897300231.tar.gz llvm-9cda5991514db77774044816fd7fbf8897300231.tar.bz2 | |
[ARM] Use searchable-table for banked registers
This is a continuation of https://reviews.llvm.org/D36219
This patch uses reverse mapping (encoding->name) in
ARMInstPrinter::printBankedRegOperand to get rid of
hard-coded values (as pointed out by @olista01).
Reviewed by: @fhahn, @rovka, @olista01
Differential Revision: https://reviews.llvm.org/D36260
llvm-svn: 310072
Diffstat (limited to 'llvm/lib/CodeGen/MachineInstr.cpp')
0 files changed, 0 insertions, 0 deletions