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authorMatt Arsenault <Matthew.Arsenault@amd.com>2022-02-18 16:22:20 -0500
committerMatt Arsenault <Matthew.Arsenault@amd.com>2022-02-21 10:36:39 -0500
commit9c7ca51b2c9ec648dc69f4891000f2a11ca7698e (patch)
tree9e980e8da0f65a993cdd09ff62f313d79240c8cd /llvm/lib/CodeGen/MachineInstr.cpp
parentee5580a8ebf264cdff0a9e149c21991f5e87431d (diff)
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MIR: Start diagnosing too many operands on an instruction
Previously this would just assert which was annoying and didn't point to the specific instruction/operand.
Diffstat (limited to 'llvm/lib/CodeGen/MachineInstr.cpp')
-rw-r--r--llvm/lib/CodeGen/MachineInstr.cpp8
1 files changed, 2 insertions, 6 deletions
diff --git a/llvm/lib/CodeGen/MachineInstr.cpp b/llvm/lib/CodeGen/MachineInstr.cpp
index 85b266a..5e63fec 100644
--- a/llvm/lib/CodeGen/MachineInstr.cpp
+++ b/llvm/lib/CodeGen/MachineInstr.cpp
@@ -232,16 +232,12 @@ void MachineInstr::addOperand(MachineFunction &MF, const MachineOperand &Op) {
}
}
-#ifndef NDEBUG
- bool isDebugOp = Op.getType() == MachineOperand::MO_Metadata ||
- Op.getType() == MachineOperand::MO_MCSymbol;
// OpNo now points as the desired insertion point. Unless this is a variadic
// instruction, only implicit regs are allowed beyond MCID->getNumOperands().
// RegMask operands go between the explicit and implicit operands.
- assert((isImpReg || Op.isRegMask() || MCID->isVariadic() ||
- OpNo < MCID->getNumOperands() || isDebugOp) &&
+ assert((MCID->isVariadic() || OpNo < MCID->getNumOperands() ||
+ Op.isValidExcessOperand()) &&
"Trying to add an operand to a machine instr that is already done!");
-#endif
MachineRegisterInfo *MRI = getRegInfo();