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| author | Simon Pilgrim <llvm-dev@redking.me.uk> | 2023-09-13 17:22:50 +0100 |
|---|---|---|
| committer | Simon Pilgrim <llvm-dev@redking.me.uk> | 2023-09-13 17:23:11 +0100 |
| commit | 8b479136c9ede8b7db00b6eeead5421f49cddb43 (patch) | |
| tree | b14a42c1850d5738952e1f50c3e8fde3b1032301 /llvm/lib/CodeGen/MachineInstr.cpp | |
| parent | 1cddbf8cf5462bf3578b0c74ef107655d63a19d6 (diff) | |
| download | llvm-8b479136c9ede8b7db00b6eeead5421f49cddb43.zip llvm-8b479136c9ede8b7db00b6eeead5421f49cddb43.tar.gz llvm-8b479136c9ede8b7db00b6eeead5421f49cddb43.tar.bz2 | |
[X86] SimplifyMultipleUseDemandedBitsForTargetNode - add X86ISD::BLENDV handling
If we know the condition mask sign bit of the demanded elements then we can directly return the LHS/RHS selection
Diffstat (limited to 'llvm/lib/CodeGen/MachineInstr.cpp')
0 files changed, 0 insertions, 0 deletions