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| author | Duncan Sands <baldrick@free.fr> | 2008-10-03 07:41:46 +0000 |
|---|---|---|
| committer | Duncan Sands <baldrick@free.fr> | 2008-10-03 07:41:46 +0000 |
| commit | 6e42742d2d4cf50e889f4617f79ecca1b1dd6e77 (patch) | |
| tree | 8d1ac17a301ba8f2dce66592a0e77fe2c089ba7f /llvm/lib/CodeGen/MachineInstr.cpp | |
| parent | 3a813a5d3fdfc3e3f1f78d3ce6e149779e361f37 (diff) | |
| download | llvm-6e42742d2d4cf50e889f4617f79ecca1b1dd6e77.zip llvm-6e42742d2d4cf50e889f4617f79ecca1b1dd6e77.tar.gz llvm-6e42742d2d4cf50e889f4617f79ecca1b1dd6e77.tar.bz2 | |
The result of getSetCCResultType (eg: i32) may be larger
than the type an i1 is promoted to (eg: i8). Account
for this. Noticed by Tilmann Scheller on CellSPU; he
will hopefully take care of fixing this in LegalizeDAG
and adding a testcase!
llvm-svn: 56997
Diffstat (limited to 'llvm/lib/CodeGen/MachineInstr.cpp')
0 files changed, 0 insertions, 0 deletions