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| author | Vikram S. Adve <vadve@cs.uiuc.edu> | 2001-08-28 23:02:39 +0000 | 
|---|---|---|
| committer | Vikram S. Adve <vadve@cs.uiuc.edu> | 2001-08-28 23:02:39 +0000 | 
| commit | 5f72f42aee9092c83d91d1ac7d62dac27c0adb81 (patch) | |
| tree | bca0c56367e1eabdf82113090bf1db8dd45f7e6c /llvm/lib/CodeGen/MachineInstr.cpp | |
| parent | 1143eff6289192eb24e168976b56584c131dfa57 (diff) | |
| download | llvm-5f72f42aee9092c83d91d1ac7d62dac27c0adb81.zip llvm-5f72f42aee9092c83d91d1ac7d62dac27c0adb81.tar.gz llvm-5f72f42aee9092c83d91d1ac7d62dac27c0adb81.tar.bz2  | |
Moved function PrintMachineInstructions here.
llvm-svn: 392
Diffstat (limited to 'llvm/lib/CodeGen/MachineInstr.cpp')
| -rw-r--r-- | llvm/lib/CodeGen/MachineInstr.cpp | 42 | 
1 files changed, 37 insertions, 5 deletions
diff --git a/llvm/lib/CodeGen/MachineInstr.cpp b/llvm/lib/CodeGen/MachineInstr.cpp index 85440ae..d636d3a 100644 --- a/llvm/lib/CodeGen/MachineInstr.cpp +++ b/llvm/lib/CodeGen/MachineInstr.cpp @@ -12,10 +12,19 @@  //	7/2/01	 -  Vikram Adve  -  Created  //**************************************************************************/ -#include "llvm/CodeGen/MachineInstr.h" + +//************************** System Include Files ***************************/ + +#include <strstream> + + +//*************************** User Include Files ***************************/ + +#include "llvm/Method.h"  #include "llvm/ConstPoolVals.h"  #include "llvm/Instruction.h" -#include <strstream> +#include "llvm/CodeGen/MachineInstr.h" +  //************************ Class Implementations **************************/ @@ -204,7 +213,7 @@ Set3OperandsFromInstrJUNK(MachineInstr* minstr,    unsigned returnFlags = 0x0; -  // Check if operand 1 is 0 and if so, try to use the register that gives 0, if any. +  // Check if operand 1 is 0.  If so, try to use a hardwired 0 register.    Value* op1Value = vmInstrNode->leftChild()->getValue();    bool isValidConstant;    int64_t intValue = GetConstantValueAsSignedInt(op1Value, isValidConstant); @@ -220,8 +229,8 @@ Set3OperandsFromInstrJUNK(MachineInstr* minstr,  					    op1Value);      } -  // Check if operand 2 (if any) fits in the immediate field of the instruction, -  // of if it is 0 and can use a dedicated machine register +  // Check if operand 2 (if any) fits in the immed. field of the instruction, +  // or if it is 0 and can use a dedicated machine register    if (op2Position >= 0)      {        Value* op2Value = vmInstrNode->rightChild()->getValue(); @@ -333,3 +342,26 @@ ChooseRegOrImmed(Value* val,    return opType;  } + + +void +PrintMachineInstructions(Method* method) +{ +  cout << "\n" << method->getReturnType() +       << " \"" << method->getName() << "\"" << endl; +   +  for (Method::const_iterator BI = method->begin(); BI != method->end(); ++BI) +    { +      BasicBlock* bb = *BI; +      cout << "\n" +	   << (bb->hasName()? bb->getName() : "Label") +	   << " (" << bb << ")" << ":" +	   << endl; +       +      MachineCodeForBasicBlock& mvec = bb->getMachineInstrVec(); +      for (unsigned i=0; i < mvec.size(); i++) +	cout << "\t" << *mvec[i] << endl; +    }  +  cout << endl << "End method \"" << method->getName() << "\"" +       << endl << endl; +}  | 
