diff options
| author | vnalamot <VenkataRamanaiah.Nalamothu@amd.com> | 2020-08-20 19:48:11 +0530 |
|---|---|---|
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2020-08-20 16:15:53 -0400 |
| commit | 54d8ded4b19aeba05006367766d148d34be01c02 (patch) | |
| tree | a849b00ace43e56079f1ee4eec6a1a9c73c72996 /llvm/lib/CodeGen/MachineInstr.cpp | |
| parent | b74b80bb2d31dfb09559fcb71a1c474a421c633d (diff) | |
| download | llvm-54d8ded4b19aeba05006367766d148d34be01c02.zip llvm-54d8ded4b19aeba05006367766d148d34be01c02.tar.gz llvm-54d8ded4b19aeba05006367766d148d34be01c02.tar.bz2 | |
allSGPRSpillsAreDead() should use actual FP/BP frame indices
The SGPR spills happen in SILowerSGPRSpills() and allSGPRSpillsAreDead()
make sure there are no SGPR spills pending during PEI. But the FP/BP
spills happen during PEI and are exceptions.
Use actual frame indices of FP/BP in allSGPRSpillsAreDead() to
accommodate the exceptions.
Differential Revision: https://reviews.llvm.org/D86291
Diffstat (limited to 'llvm/lib/CodeGen/MachineInstr.cpp')
0 files changed, 0 insertions, 0 deletions