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| author | Amara Emerson <amara@apple.com> | 2020-11-03 11:17:31 -0800 |
|---|---|---|
| committer | Amara Emerson <amara@apple.com> | 2020-11-03 17:25:14 -0800 |
| commit | 393b55380afcd8681db03dfbdea2f27ff3517d25 (patch) | |
| tree | 17033cc5565fdadf255412a7553aa78c414f0148 /llvm/lib/CodeGen/MachineInstr.cpp | |
| parent | c298824f9caf407aedeb4958467fb2a18025638d (diff) | |
| download | llvm-393b55380afcd8681db03dfbdea2f27ff3517d25.zip llvm-393b55380afcd8681db03dfbdea2f27ff3517d25.tar.gz llvm-393b55380afcd8681db03dfbdea2f27ff3517d25.tar.bz2 | |
[AArch64][GlobalISel] Add combine for G_EXTRACT_VECTOR_ELT to allow selection of pairwise FADD.
For the <2 x float> case, instead of adding another combine or legalization to
get it into a <4 x float> form, I'm just adding a GISel specific selection
pattern to cover it.
Differential Revision: https://reviews.llvm.org/D90699
Diffstat (limited to 'llvm/lib/CodeGen/MachineInstr.cpp')
0 files changed, 0 insertions, 0 deletions