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author | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2012-12-20 22:54:05 +0000 |
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committer | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2012-12-20 22:54:05 +0000 |
commit | 2455b585514887c104f5681381ced1847870d001 (patch) | |
tree | caa2af47a6a2063a116f5596b22bd19e232a4da9 /llvm/lib/CodeGen/MachineInstr.cpp | |
parent | 33f5d1492d624c12d12226a3fae08aa126855c5b (diff) | |
download | llvm-2455b585514887c104f5681381ced1847870d001.zip llvm-2455b585514887c104f5681381ced1847870d001.tar.gz llvm-2455b585514887c104f5681381ced1847870d001.tar.bz2 |
Require the two-argument MI::addOperand(MF, MO) for dangling instructions.
Instructions that are inserted in a basic block can still be decorated
with addOperand(MO).
Make the two-argument addOperand() function contain the actual
implementation. This function will now always have a valid MF reference
that it can use for memory allocation.
llvm-svn: 170798
Diffstat (limited to 'llvm/lib/CodeGen/MachineInstr.cpp')
-rw-r--r-- | llvm/lib/CodeGen/MachineInstr.cpp | 10 |
1 files changed, 9 insertions, 1 deletions
diff --git a/llvm/lib/CodeGen/MachineInstr.cpp b/llvm/lib/CodeGen/MachineInstr.cpp index a989490..675df19 100644 --- a/llvm/lib/CodeGen/MachineInstr.cpp +++ b/llvm/lib/CodeGen/MachineInstr.cpp @@ -603,11 +603,19 @@ void MachineInstr::AddRegOperandsToUseLists(MachineRegisterInfo &MRI) { MRI.addRegOperandToUseList(&Operands[i]); } +void MachineInstr::addOperand(const MachineOperand &Op) { + MachineBasicBlock *MBB = getParent(); + assert(MBB && "Use MachineInstrBuilder to add operands to dangling instrs"); + MachineFunction *MF = MBB->getParent(); + assert(MF && "Use MachineInstrBuilder to add operands to dangling instrs"); + addOperand(*MF, Op); +} + /// addOperand - Add the specified operand to the instruction. If it is an /// implicit operand, it is added to the end of the operand list. If it is /// an explicit operand it is added at the end of the explicit operand list /// (before the first implicit operand). -void MachineInstr::addOperand(const MachineOperand &Op) { +void MachineInstr::addOperand(MachineFunction &MF, const MachineOperand &Op) { assert(MCID && "Cannot add operands before providing an instr descriptor"); bool isImpReg = Op.isReg() && Op.isImplicit(); MachineRegisterInfo *RegInfo = getRegInfo(); |