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| author | Konstantin Schwarz <konstantin.schwarz@hightec-rt.com> | 2020-04-14 09:24:40 +0200 |
|---|---|---|
| committer | Konstantin Schwarz <konstantin.schwarz@hightec-rt.com> | 2020-04-16 13:46:14 +0200 |
| commit | 1a3e89aa2bd26ad05b25635457bad28f46427eeb (patch) | |
| tree | 47d38fd357eafecb108495e69f6aba5bb2d87436 /llvm/lib/CodeGen/MachineInstr.cpp | |
| parent | 43e2460a89abf6aace35973c682e1723d5f16f10 (diff) | |
| download | llvm-1a3e89aa2bd26ad05b25635457bad28f46427eeb.zip llvm-1a3e89aa2bd26ad05b25635457bad28f46427eeb.tar.gz llvm-1a3e89aa2bd26ad05b25635457bad28f46427eeb.tar.bz2 | |
[MIR] Add comments to INLINEASM immediate flag MachineOperands
Summary:
The INLINEASM MIR instructions use immediate operands to encode the values of some operands.
The MachineInstr pretty printer function already handles those operands and prints human readable annotations instead of the immediates. This patch adds similar annotations to the output of the MIRPrinter, however uses the new MIROperandComment feature.
Reviewers: SjoerdMeijer, arsenm, efriedma
Reviewed By: arsenm
Subscribers: qcolombet, sdardis, jvesely, wdng, nhaehnle, hiraditya, jrtc27, atanasyan, kerbowa, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D78088
Diffstat (limited to 'llvm/lib/CodeGen/MachineInstr.cpp')
| -rw-r--r-- | llvm/lib/CodeGen/MachineInstr.cpp | 35 |
1 files changed, 3 insertions, 32 deletions
diff --git a/llvm/lib/CodeGen/MachineInstr.cpp b/llvm/lib/CodeGen/MachineInstr.cpp index 542dc22..8ee85c6 100644 --- a/llvm/lib/CodeGen/MachineInstr.cpp +++ b/llvm/lib/CodeGen/MachineInstr.cpp @@ -1669,15 +1669,8 @@ void MachineInstr::print(raw_ostream &OS, ModuleSlotTracker &MST, // Pretty print the inline asm operand descriptor. OS << '$' << AsmOpCount++; unsigned Flag = MO.getImm(); - switch (InlineAsm::getKind(Flag)) { - case InlineAsm::Kind_RegUse: OS << ":[reguse"; break; - case InlineAsm::Kind_RegDef: OS << ":[regdef"; break; - case InlineAsm::Kind_RegDefEarlyClobber: OS << ":[regdef-ec"; break; - case InlineAsm::Kind_Clobber: OS << ":[clobber"; break; - case InlineAsm::Kind_Imm: OS << ":[imm"; break; - case InlineAsm::Kind_Mem: OS << ":[mem"; break; - default: OS << ":[??" << InlineAsm::getKind(Flag); break; - } + OS << ":["; + OS << InlineAsm::getKindName(InlineAsm::getKind(Flag)); unsigned RCID = 0; if (!InlineAsm::isImmKind(Flag) && !InlineAsm::isMemKind(Flag) && @@ -1690,29 +1683,7 @@ void MachineInstr::print(raw_ostream &OS, ModuleSlotTracker &MST, if (InlineAsm::isMemKind(Flag)) { unsigned MCID = InlineAsm::getMemoryConstraintID(Flag); - switch (MCID) { - case InlineAsm::Constraint_es: OS << ":es"; break; - case InlineAsm::Constraint_i: OS << ":i"; break; - case InlineAsm::Constraint_m: OS << ":m"; break; - case InlineAsm::Constraint_o: OS << ":o"; break; - case InlineAsm::Constraint_v: OS << ":v"; break; - case InlineAsm::Constraint_Q: OS << ":Q"; break; - case InlineAsm::Constraint_R: OS << ":R"; break; - case InlineAsm::Constraint_S: OS << ":S"; break; - case InlineAsm::Constraint_T: OS << ":T"; break; - case InlineAsm::Constraint_Um: OS << ":Um"; break; - case InlineAsm::Constraint_Un: OS << ":Un"; break; - case InlineAsm::Constraint_Uq: OS << ":Uq"; break; - case InlineAsm::Constraint_Us: OS << ":Us"; break; - case InlineAsm::Constraint_Ut: OS << ":Ut"; break; - case InlineAsm::Constraint_Uv: OS << ":Uv"; break; - case InlineAsm::Constraint_Uy: OS << ":Uy"; break; - case InlineAsm::Constraint_X: OS << ":X"; break; - case InlineAsm::Constraint_Z: OS << ":Z"; break; - case InlineAsm::Constraint_ZC: OS << ":ZC"; break; - case InlineAsm::Constraint_Zy: OS << ":Zy"; break; - default: OS << ":?"; break; - } + OS << ":" << InlineAsm::getMemConstraintName(MCID); } unsigned TiedTo = 0; |