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| author | Petar Avramovic <Petar.Avramovic@amd.com> | 2020-09-14 10:39:25 +0200 |
|---|---|---|
| committer | Petar Avramovic <Petar.Avramovic@amd.com> | 2020-09-14 10:39:56 +0200 |
| commit | 09b8871f8d81ce2777afe836604f392a2af9e620 (patch) | |
| tree | 7183ea9c94a6be33de57bf4635aaa555c2396326 /llvm/lib/CodeGen/MachineInstr.cpp | |
| parent | bfcb824ba5287f96c5b9f1009d10af37b7eb9519 (diff) | |
| download | llvm-09b8871f8d81ce2777afe836604f392a2af9e620.zip llvm-09b8871f8d81ce2777afe836604f392a2af9e620.tar.gz llvm-09b8871f8d81ce2777afe836604f392a2af9e620.tar.bz2 | |
AMDGPU/GlobalISel/Emitter Support for predicate code that uses operands
Predicates with 'let PredicateCodeUsesOperands = 1' want to examine
matched operands. When we encounter predicate code that uses operands,
analyze its named operand arguments and create a map between argument
index and name. Later, when leaf node with name is encountered, emit
GIM_RecordNamedOperand that will store that operand at its argument
index in operand list. This operand list will be an argument to c++
code of the predicate.
Differential Revision: https://reviews.llvm.org/D87285
Diffstat (limited to 'llvm/lib/CodeGen/MachineInstr.cpp')
0 files changed, 0 insertions, 0 deletions