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authorPaul Walker <paul.walker@arm.com>2024-04-23 11:36:20 +0100
committerGitHub <noreply@github.com>2024-04-23 11:36:20 +0100
commit34caafe84ffd8588e717c92da358ad9368cc4fe5 (patch)
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parentf89f670d92b5726fc61bf8252a6ecc273086c501 (diff)
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[LLVM][CodeGen][AArch64] Simplify lowering for predicate inserts. (#89072)
The original code has an invalid use of UZP1 because the result vector type does not match its input vector types. Rather than insert extra nop casts I figure it would be better to use CONCAT_VECTORS because that's the operation we're performing. NOTE: This is a step to enable more asserts in verifyTargetSDNode.
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