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| author | Min-Yih Hsu <min.hsu@sifive.com> | 2025-01-23 15:27:51 -0800 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2025-01-23 15:27:51 -0800 |
| commit | bc74a1edbe5e6a3603e65efe06116fa72747acab (patch) | |
| tree | 430a19dc2b4721361f6a93f167be1d062985fdd6 /llvm/lib/CodeGen/MachineFunctionPass.cpp | |
| parent | 10772807ab72ce2b68d76816f8753219b2acbac3 (diff) | |
| download | llvm-bc74a1edbe5e6a3603e65efe06116fa72747acab.zip llvm-bc74a1edbe5e6a3603e65efe06116fa72747acab.tar.gz llvm-bc74a1edbe5e6a3603e65efe06116fa72747acab.tar.bz2 | |
[IA] Generalize the support for power-of-two (de)interleave intrinsics (#123863)
Previously, AArch64 used pattern matching to support
llvm.vector.(de)interleave of 2 and 4; RISC-V only supported
(de)interleave of 2.
This patch consolidates the logics in these two targets by factoring out
the common factor calculations into the InterleaveAccess Pass.
Diffstat (limited to 'llvm/lib/CodeGen/MachineFunctionPass.cpp')
0 files changed, 0 insertions, 0 deletions