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| author | Mingming Liu <mingmingl@google.com> | 2022-10-14 15:26:04 -0700 |
|---|---|---|
| committer | Mingming Liu <mingmingl@google.com> | 2022-10-17 09:01:29 -0700 |
| commit | db0286a09626a3a29ceacbe95a1a05004f62242c (patch) | |
| tree | 98acc748400a92018f7abe63ab907ebb6312ef41 /llvm/lib/CodeGen/MachineFunction.cpp | |
| parent | 970e1ea01aa0dce4f606eee1610c92b8b838f303 (diff) | |
| download | llvm-db0286a09626a3a29ceacbe95a1a05004f62242c.zip llvm-db0286a09626a3a29ceacbe95a1a05004f62242c.tar.gz llvm-db0286a09626a3a29ceacbe95a1a05004f62242c.tar.bz2 | |
[AArch64]Enhance 'isBitfieldPositioningOp' to find pattern (shl(and(val,mask), N).
Before this patch (and D135844)
- Given DAG node shl(op, N), isBitfieldPositioningOp uses (optionally shifted [1] ) op as the Src (least significant bits of Src are inserted into DstLSB of Dst node).
After this patch
- If op is and(val, mask), isBitfieldPositioningOp tries to see through and and find if val is a simpler source than op.
It helps in a similar (probably symmetric) way how isSeveralBitsExtractOpFromShr [2] optimizes isBitfieldExtractOpFromShr
Existing test cases are improved without regressions.
[1] https://github.com/llvm/llvm-project/blob/cbd8464595220b5ea76c70ac9965d84970c4b712/llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp#L2546
[2] https://github.com/llvm/llvm-project/blob/cbd8464595220b5ea76c70ac9965d84970c4b712/llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp#L2057
Differential Revision: https://reviews.llvm.org/D135850
Diffstat (limited to 'llvm/lib/CodeGen/MachineFunction.cpp')
0 files changed, 0 insertions, 0 deletions