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author | Stephen Tozer <Stephen.Tozer@Sony.com> | 2023-01-03 18:13:31 +0000 |
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committer | Stephen Tozer <Stephen.Tozer@Sony.com> | 2023-01-09 08:58:33 +0000 |
commit | da0faa0594b9df6d401d1e5686ff32766148b075 (patch) | |
tree | 274480f80991ac2df684763d5b4db2327a92d4b8 /llvm/lib/CodeGen/MachineFunction.cpp | |
parent | 570bf972f5adf05438c7e08d693bf4b96bfd510a (diff) | |
download | llvm-da0faa0594b9df6d401d1e5686ff32766148b075.zip llvm-da0faa0594b9df6d401d1e5686ff32766148b075.tar.gz llvm-da0faa0594b9df6d401d1e5686ff32766148b075.tar.bz2 |
[DebugInfo] Produce variadic DBG_INSTR_REFs from ISel
This patch modifies SelectionDAG and FastISel to produce DBG_INSTR_REFs with
variadic expressions, and produce DBG_INSTR_REFs for debug values with variadic
location expressions. The former essentially means just prepending
DW_OP_LLVM_arg, 0 to the existing expression. The latter is achieved in
MachineFunction::finalizeDebugInstrRefs and InstrEmitter::EmitDbgInstrRef.
Reviewed By: jmorse, Orlando
Differential Revision: https://reviews.llvm.org/D133929
Diffstat (limited to 'llvm/lib/CodeGen/MachineFunction.cpp')
-rw-r--r-- | llvm/lib/CodeGen/MachineFunction.cpp | 77 |
1 files changed, 41 insertions, 36 deletions
diff --git a/llvm/lib/CodeGen/MachineFunction.cpp b/llvm/lib/CodeGen/MachineFunction.cpp index 9625099..ba73abd 100644 --- a/llvm/lib/CodeGen/MachineFunction.cpp +++ b/llvm/lib/CodeGen/MachineFunction.cpp @@ -44,7 +44,6 @@ #include "llvm/IR/BasicBlock.h" #include "llvm/IR/Constant.h" #include "llvm/IR/DataLayout.h" -#include "llvm/IR/DebugInfoMetadata.h" #include "llvm/IR/DerivedTypes.h" #include "llvm/IR/Function.h" #include "llvm/IR/GlobalValue.h" @@ -1136,52 +1135,58 @@ void MachineFunction::finalizeDebugInstrRefs() { auto MakeUndefDbgValue = [&](MachineInstr &MI) { const MCInstrDesc &RefII = TII->get(TargetOpcode::DBG_VALUE_LIST); MI.setDesc(RefII); - MI.getDebugOperand(0).setReg(0); + MI.setDebugValueUndef(); }; DenseMap<Register, DebugInstrOperandPair> ArgDbgPHIs; for (auto &MBB : *this) { for (auto &MI : MBB) { - if (!MI.isDebugRef() || !MI.getDebugOperand(0).isReg()) + if (!MI.isDebugRef()) continue; - Register Reg = MI.getDebugOperand(0).getReg(); + bool IsValidRef = true; - // Some vregs can be deleted as redundant in the meantime. Mark those - // as DBG_VALUE $noreg. Additionally, some normal instructions are - // quickly deleted, leaving dangling references to vregs with no def. - if (Reg == 0 || !RegInfo->hasOneDef(Reg)) { - MakeUndefDbgValue(MI); - continue; - } - // Only convert Expr to variadic form when we're sure we're emitting a - // complete instruction reference. - MI.getDebugExpressionOp().setMetadata( - DIExpression::convertToVariadicExpression(MI.getDebugExpression())); - - assert(Reg.isVirtual()); - MachineInstr &DefMI = *RegInfo->def_instr_begin(Reg); - - // If we've found a copy-like instruction, follow it back to the - // instruction that defines the source value, see salvageCopySSA docs - // for why this is important. - if (DefMI.isCopyLike() || TII->isCopyInstr(DefMI)) { - auto Result = salvageCopySSA(DefMI, ArgDbgPHIs); - MI.getDebugOperand(0).ChangeToDbgInstrRef(Result.first, Result.second); - } else { - // Otherwise, identify the operand number that the VReg refers to. - unsigned OperandIdx = 0; - for (const auto &MO : DefMI.operands()) { - if (MO.isReg() && MO.isDef() && MO.getReg() == Reg) - break; - ++OperandIdx; + for (MachineOperand &MO : MI.debug_operands()) { + if (!MO.isReg()) + continue; + + Register Reg = MO.getReg(); + + // Some vregs can be deleted as redundant in the meantime. Mark those + // as DBG_VALUE $noreg. Additionally, some normal instructions are + // quickly deleted, leaving dangling references to vregs with no def. + if (Reg == 0 || !RegInfo->hasOneDef(Reg)) { + IsValidRef = false; + break; } - assert(OperandIdx < DefMI.getNumOperands()); - // Morph this instr ref to point at the given instruction and operand. - unsigned ID = DefMI.getDebugInstrNum(); - MI.getDebugOperand(0).ChangeToDbgInstrRef(ID, OperandIdx); + assert(Reg.isVirtual()); + MachineInstr &DefMI = *RegInfo->def_instr_begin(Reg); + + // If we've found a copy-like instruction, follow it back to the + // instruction that defines the source value, see salvageCopySSA docs + // for why this is important. + if (DefMI.isCopyLike() || TII->isCopyInstr(DefMI)) { + auto Result = salvageCopySSA(DefMI, ArgDbgPHIs); + MO.ChangeToDbgInstrRef(Result.first, Result.second); + } else { + // Otherwise, identify the operand number that the VReg refers to. + unsigned OperandIdx = 0; + for (const auto &DefMO : DefMI.operands()) { + if (DefMO.isReg() && DefMO.isDef() && DefMO.getReg() == Reg) + break; + ++OperandIdx; + } + assert(OperandIdx < DefMI.getNumOperands()); + + // Morph this instr ref to point at the given instruction and operand. + unsigned ID = DefMI.getDebugInstrNum(); + MO.ChangeToDbgInstrRef(ID, OperandIdx); + } } + + if (!IsValidRef) + MakeUndefDbgValue(MI); } } } |