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| author | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2009-04-30 21:22:44 +0000 |
|---|---|---|
| committer | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2009-04-30 21:22:44 +0000 |
| commit | c8124976af23968a50c94dff21783280e1fd004c (patch) | |
| tree | 6c738cc94025484b578a654e82d7a5382bc63474 /llvm/lib/CodeGen/MachineFunction.cpp | |
| parent | fa066ef136e02c5191f776ce7acffbe967ef017c (diff) | |
| download | llvm-c8124976af23968a50c94dff21783280e1fd004c.zip llvm-c8124976af23968a50c94dff21783280e1fd004c.tar.gz llvm-c8124976af23968a50c94dff21783280e1fd004c.tar.bz2 | |
Slightly change TableGen's definition of a register subclass.
A subclass is allowed to have a larger spill size than the superclass, and the
spill alignment must be a multiple of the superclass alignment. This causes
the following new subclass relations:
=== Alpha ===
F4RC -> F8RC
=== PPC ===
F4RC -> F8RC
=== SPU ===
R8C -> R16C -> R32C/R32FP -> R64C/R64FP -> GPRC/VECREG
=== X86 ===
FR32 -> FR64 -> VR128
RFP32 -> RFP64 -> RFP80
These subclass relations are consistent with the behaviour of -join-cross-class-copies.
llvm-svn: 70511
Diffstat (limited to 'llvm/lib/CodeGen/MachineFunction.cpp')
0 files changed, 0 insertions, 0 deletions