diff options
| author | Jack Andersen <jackoalan@gmail.com> | 2021-10-07 16:02:30 +0100 |
|---|---|---|
| committer | Stephen Tozer <stephen.tozer@sony.com> | 2021-10-07 16:08:52 +0100 |
| commit | bd4dad87f421db82430f9958b52fbccc69d91b16 (patch) | |
| tree | 2a4f8b67069be00b94d6944f0293c708257375ea /llvm/lib/CodeGen/MachineFunction.cpp | |
| parent | 3e9689d72cdffab9672427c664d699334948088a (diff) | |
| download | llvm-bd4dad87f421db82430f9958b52fbccc69d91b16.zip llvm-bd4dad87f421db82430f9958b52fbccc69d91b16.tar.gz llvm-bd4dad87f421db82430f9958b52fbccc69d91b16.tar.bz2 | |
[MachineInstr] Move MIParser's DBG_VALUE RegState::Debug invariant into MachineInstr::addOperand
Based on the reasoning of D53903, register operands of DBG_VALUE are
invariably treated as RegState::Debug operands. This change enforces
this invariant as part of MachineInstr::addOperand so that all passes
emit this flag consistently.
RegState::Debug is inconsistently set on DBG_VALUE registers throughout
LLVM. This runs the risk of a filtering iterator like
MachineRegisterInfo::reg_nodbg_iterator to process these operands
erroneously when not parsed from MIR sources.
This issue was observed in the development of the llvm-mos fork which
adds a backend that relies on physical register operands much more than
existing targets. Physical RegUnit 0 has the same numeric encoding as
$noreg (indicating an undef for DBG_VALUE). Allowing debug operands into
the machine scheduler correlates $noreg with RegUnit 0 (i.e. a collision
of register numbers with different zero semantics). Eventually, this
causes an assert where DBG_VALUE instructions are prohibited from
participating in live register ranges.
Reviewed By: MatzeB, StephenTozer
Differential Revision: https://reviews.llvm.org/D110105
Diffstat (limited to 'llvm/lib/CodeGen/MachineFunction.cpp')
| -rw-r--r-- | llvm/lib/CodeGen/MachineFunction.cpp | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/llvm/lib/CodeGen/MachineFunction.cpp b/llvm/lib/CodeGen/MachineFunction.cpp index bd13c28..e118d6d 100644 --- a/llvm/lib/CodeGen/MachineFunction.cpp +++ b/llvm/lib/CodeGen/MachineFunction.cpp @@ -1158,7 +1158,7 @@ auto MachineFunction::salvageCopySSA(MachineInstr &MI) // Create DBG_PHI for specified physreg. auto Builder = BuildMI(InsertBB, InsertBB.getFirstNonPHI(), DebugLoc(), TII.get(TargetOpcode::DBG_PHI)); - Builder.addReg(State.first, RegState::Debug); + Builder.addReg(State.first); unsigned NewNum = getNewDebugInstrNum(); Builder.addImm(NewNum); return ApplySubregisters({NewNum, 0u}); @@ -1171,7 +1171,6 @@ void MachineFunction::finalizeDebugInstrRefs() { const MCInstrDesc &RefII = TII->get(TargetOpcode::DBG_VALUE); MI.setDesc(RefII); MI.getOperand(1).ChangeToRegister(0, false); - MI.getOperand(0).setIsDebug(); }; if (!useDebugInstrRef()) |