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authorPhilip Reames <preames@rivosinc.com>2025-06-18 08:53:45 -0700
committerGitHub <noreply@github.com>2025-06-18 08:53:45 -0700
commitb5aaf9d988ff2dc652c86271b181bf0497eb97cb (patch)
tree99bf3964e848ebcc564359573af8ea3ecc23e42e /llvm/lib/CodeGen/MachineFunction.cpp
parent5d502aeddf2a5d93c3fd93103054261acf4d92f3 (diff)
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[InstCombine] Implement vp.reverse reordering/elimination through binop/unop (#143963)
This simply copies the structure of the vector.reverse patterns from just above, and reimplements them for the vp.reverse intrinsics when the mask is all ones and the EVLs exactly match. Its unfortunate that we have three different ways to represent a reverse (shuffle, vector.reverse, and vp.reverse) but I don't see an obvious way to remove any them because the semantics are slightly different. This significantly improves vectorization in TSVC_2's s112 and s1112 loops when using EVL tail folding.
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