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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2020-02-14 15:39:44 -0500 |
|---|---|---|
| committer | Matt Arsenault <arsenm2@gmail.com> | 2020-03-16 14:34:29 -0400 |
| commit | b0bdb186f506d7fa2686f1c09bb8926b6adeb91d (patch) | |
| tree | 17b1b74871f6df035989ed0283dbf9c2220aba71 /llvm/lib/CodeGen/MachineFunction.cpp | |
| parent | 05e7d8d6ce0e4f87aa1c4490d9f843360a6b2ca5 (diff) | |
| download | llvm-b0bdb186f506d7fa2686f1c09bb8926b6adeb91d.zip llvm-b0bdb186f506d7fa2686f1c09bb8926b6adeb91d.tar.gz llvm-b0bdb186f506d7fa2686f1c09bb8926b6adeb91d.tar.bz2 | |
Utils: Always set alignment when expanding mem intrinsics
This was creating natural aligned loads and stores, which may not be
the case. The target could request a wider type load with less
alignment.
Diffstat (limited to 'llvm/lib/CodeGen/MachineFunction.cpp')
0 files changed, 0 insertions, 0 deletions