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| author | Craig Topper <craig.topper@sifive.com> | 2024-11-07 13:57:11 -0800 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2024-11-07 13:57:11 -0800 |
| commit | ae9d0623ad65d84022bb4ed8446b6491451ae575 (patch) | |
| tree | 59c0fe8f5862a358e5911ddedb9da5270683ff22 /llvm/lib/CodeGen/MachineFunction.cpp | |
| parent | dec38399795a7f238508ee100e5b057165724a60 (diff) | |
| download | llvm-ae9d0623ad65d84022bb4ed8446b6491451ae575.zip llvm-ae9d0623ad65d84022bb4ed8446b6491451ae575.tar.gz llvm-ae9d0623ad65d84022bb4ed8446b6491451ae575.tar.bz2 | |
[RISCV][GISel] Remove s32 input support for G_SITOFP/UITOFP on RV64. (#115236)
I plan to make i32 an illegal type for RV64 to match SelectionDAG and to
remove i32 from the GPR register class.
I've added a sexti32 ComplexPattern to select sext.w+fcvt.s.l as
fcvt.s.w. The recently added zexti32 handles selecting and+fcvt.s.lu as
fcvt.s.wu. There are still some regressions that suggest we should match
g_zero_extend in zexti32.
Diffstat (limited to 'llvm/lib/CodeGen/MachineFunction.cpp')
0 files changed, 0 insertions, 0 deletions