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| author | Mirko Brkusanin <Mirko.Brkusanin@amd.com> | 2020-09-18 15:19:54 +0200 |
|---|---|---|
| committer | Mirko Brkusanin <Mirko.Brkusanin@amd.com> | 2020-09-18 15:26:24 +0200 |
| commit | ae36c02ad0cb0a618c8715404dcfab4cf49c6612 (patch) | |
| tree | b0446cf184424e3cb0755fd2f5fc0c6d182228af /llvm/lib/CodeGen/MachineFunction.cpp | |
| parent | 6690de098e43ac5741297e435aece71b971b5bd2 (diff) | |
| download | llvm-ae36c02ad0cb0a618c8715404dcfab4cf49c6612.zip llvm-ae36c02ad0cb0a618c8715404dcfab4cf49c6612.tar.gz llvm-ae36c02ad0cb0a618c8715404dcfab4cf49c6612.tar.bz2 | |
[AMDGPU] Set DS alignment requirements to be more strict
Alignment requirements for ds_read/write_b96/b128 for gfx9 and onward are
now the same as for other GCN subtargets. This way we can avoid any
unintentional use of these instructions on systems that do not support dword
alignment and instead require natural alignment.
This also makes 'SH_MEM_CONFIG.alignment_mode == STRICT' the default.
Differential Revision: https://reviews.llvm.org/D87821
Diffstat (limited to 'llvm/lib/CodeGen/MachineFunction.cpp')
0 files changed, 0 insertions, 0 deletions