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| author | Sourabh Singh Tomar <SourabhSingh.Tomar@amd.com> | 2020-02-11 23:59:40 +0530 |
|---|---|---|
| committer | Sourabh Singh Tomar <SourabhSingh.Tomar@amd.com> | 2020-02-19 10:33:39 +0530 |
| commit | a71feda24ea092ec14474216532b3ce9883b81ab (patch) | |
| tree | 131ec801c8be35569fd80a68323ec8187a63d8d2 /llvm/lib/CodeGen/MachineFunction.cpp | |
| parent | d840e5452315e69d44cfe44b766e633964681b6a (diff) | |
| download | llvm-a71feda24ea092ec14474216532b3ce9883b81ab.zip llvm-a71feda24ea092ec14474216532b3ce9883b81ab.tar.gz llvm-a71feda24ea092ec14474216532b3ce9883b81ab.tar.bz2 | |
[DebugInfo]: Added support for DWARFv5 Info section header parsing in llvm-dwp utility.
Summary:
This patch teaches llvm-dwp to parse DWARFv5 info section header.
Tested this using asm test case caontaining DWARFv5 info.
Assemling it to DWO object, checking corresponding content using llvm-dwarfdump. Then finally, packaging it
to DWP using llvm-dwp and again checking corresponding content using llvm-dwarfdump.
Reviewers: dblaikie, aprantl, probinson.
Reviewed By: dblaikie.
Differential Revision: https://reviews.llvm.org/D74425
Diffstat (limited to 'llvm/lib/CodeGen/MachineFunction.cpp')
0 files changed, 0 insertions, 0 deletions