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| author | Craig Topper <craig.topper@intel.com> | 2018-11-16 21:04:58 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@intel.com> | 2018-11-16 21:04:58 +0000 |
| commit | 9e97054211a898b9670979512e9e0b227d72bec3 (patch) | |
| tree | eac0960575edec527eb2a059258a543b1e2bcdd2 /llvm/lib/CodeGen/MachineFunction.cpp | |
| parent | 7fff9a9aef4849be8f7b1a8949b12a22905f6c1d (diff) | |
| download | llvm-9e97054211a898b9670979512e9e0b227d72bec3.zip llvm-9e97054211a898b9670979512e9e0b227d72bec3.tar.gz llvm-9e97054211a898b9670979512e9e0b227d72bec3.tar.bz2 | |
[LegalizeVectorOps] After custom legalizing an extending load or a truncating store, make sure the custom code is also legal.
For example, on X86 we emit a sign_extend_vector_inreg from LowerLoad and without sse4.1 this node will need further legalization. Previously this sign_extend_vector_inreg was being custom lowered during DAG legalization instead of vector op legalization.
Unfortunately, this doesn't seem to matter for the output of any existing lit tests.
llvm-svn: 347094
Diffstat (limited to 'llvm/lib/CodeGen/MachineFunction.cpp')
0 files changed, 0 insertions, 0 deletions