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author | Arthur Eubanks <aeubanks@google.com> | 2020-12-28 09:27:28 -0800 |
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committer | Arthur Eubanks <aeubanks@google.com> | 2020-12-28 10:38:51 -0800 |
commit | 9abc457724bd54014328a6f0b7ed230bacd9f610 (patch) | |
tree | 56eaecc68e0602eb35db39079874c49858a0ee7b /llvm/lib/CodeGen/MachineFunction.cpp | |
parent | 7b00e9fae3853d4693e608cc52f6d6da5059f5ff (diff) | |
download | llvm-9abc457724bd54014328a6f0b7ed230bacd9f610.zip llvm-9abc457724bd54014328a6f0b7ed230bacd9f610.tar.gz llvm-9abc457724bd54014328a6f0b7ed230bacd9f610.tar.bz2 |
[NewPM][AMDGPU] Port amdgpu-simplifylib/amdgpu-usenative
And add them to the pipeline via
AMDGPUTargetMachine::registerPassBuilderCallbacks(), which mirrors
AMDGPUTargetMachine::adjustPassManager().
These passes can't be unconditionally added to PassRegistry.def since
they are only present when the AMDGPU backend is enabled. And there are
no target-specific headers in llvm/include, so parsing these pass names
must occur somewhere in the AMDGPU directory. I decided the best place
was inside the TargetMachine, since the PassBuilder invokes
TargetMachine::registerPassBuilderCallbacks() anyway. If we come up with
a cleaner solution for target-specific passes in the future that's fine,
but there aren't too many target-specific IR passes living in
target-specific directories so it shouldn't be too bad to change in the
future.
Reviewed By: ychen, arsenm
Differential Revision: https://reviews.llvm.org/D93863
Diffstat (limited to 'llvm/lib/CodeGen/MachineFunction.cpp')
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