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| author | Caroline Concatto <caroline.concatto@arm.com> | 2021-07-06 09:19:16 +0100 |
|---|---|---|
| committer | Caroline Concatto <caroline.concatto@arm.com> | 2021-07-26 11:25:01 +0100 |
| commit | 73e4e9cd007a71fb7186933abdcae024fe65cea7 (patch) | |
| tree | 9cbb26e222192e6fb022ee65ec2ea1da55fefd88 /llvm/lib/CodeGen/MachineFunction.cpp | |
| parent | c8472db0a88701e8c1b183d6568028fefc3406c0 (diff) | |
| download | llvm-73e4e9cd007a71fb7186933abdcae024fe65cea7.zip llvm-73e4e9cd007a71fb7186933abdcae024fe65cea7.tar.gz llvm-73e4e9cd007a71fb7186933abdcae024fe65cea7.tar.bz2 | |
[AArch64][SVE] Improve code generation for vector_splice for Imm == -1
This patch implements vector_splice in tablegen for:
a) when the immediate is equal to -1 (Imm==1) and uses:
INSR + LASTB
For instance :
@llvm.experimental.vector.splice(Vector_1, Vector_2, -1)
@llvm.experimental.vector.splice(<A,B,C,D>, <E,F,G,H>, 1) ==> <D, E, F, G>
LAST RegLast, Vector_1 // RegLast = D
INSR Res, (Vector_1 >> 1), RegLast // Res = D + E, F, G
Differential Revision: https://reviews.llvm.org/D105633
Diffstat (limited to 'llvm/lib/CodeGen/MachineFunction.cpp')
0 files changed, 0 insertions, 0 deletions