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| author | David Chisnall <csdavec@swan.ac.uk> | 2012-10-11 10:21:34 +0000 |
|---|---|---|
| committer | David Chisnall <csdavec@swan.ac.uk> | 2012-10-11 10:21:34 +0000 |
| commit | 6a00ab4b5e37ab8ba459cdd0211360cc05e810e1 (patch) | |
| tree | 913387393736beb082b817554e405c98079a239a /llvm/lib/CodeGen/MachineFunction.cpp | |
| parent | cf4ff586e8c2e26041befa0941a6552ad902df2f (diff) | |
| download | llvm-6a00ab4b5e37ab8ba459cdd0211360cc05e810e1.zip llvm-6a00ab4b5e37ab8ba459cdd0211360cc05e810e1.tar.gz llvm-6a00ab4b5e37ab8ba459cdd0211360cc05e810e1.tar.bz2 | |
Expose move to/from coprocessor instructions in MIPS64 mode.
Note: [D]M{T,F}CP2 is just a recommended encoding. Vendors often provide a
custom CP2 that interprets instructions differently and may wish to add their
own instructions that use this opcode. We should ensure that this is easy to
do. I will probably add a 'has custom CP{0-3}' subtarget flag to make this
easy: We want to avoid the GCC situation where every MIPS vendor makes a custom
fork that breaks every other MIPS CPU and so can't be merged upstream.
llvm-svn: 165711
Diffstat (limited to 'llvm/lib/CodeGen/MachineFunction.cpp')
0 files changed, 0 insertions, 0 deletions