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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2020-09-17 12:07:59 -0400 |
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| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2020-09-18 09:48:33 -0400 |
| commit | 27df1652709ba83d6b07f313297e7c796e36dce1 (patch) | |
| tree | 25d5d29f8c4507b3bb39931ba944eb264b133350 /llvm/lib/CodeGen/MachineFunction.cpp | |
| parent | 455ca0ebb69210046928fedffe292420a30f89ad (diff) | |
| download | llvm-27df1652709ba83d6b07f313297e7c796e36dce1.zip llvm-27df1652709ba83d6b07f313297e7c796e36dce1.tar.gz llvm-27df1652709ba83d6b07f313297e7c796e36dce1.tar.bz2 | |
Revert "[amdgpu] Lower SGPR-to-VGPR copy in the final phase of ISel."
This reverts commit c3492a1aa1b98c8d81b0969d52cea7681f0624c2.
I think this is the wrong strategy and wrong place to do this
transform anyway. Also reverts follow up commit
7d593d0d6905b55ca1124fca5e4d1ebb17203138.
Diffstat (limited to 'llvm/lib/CodeGen/MachineFunction.cpp')
0 files changed, 0 insertions, 0 deletions