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| author | Chris Lattner <sabre@nondot.org> | 2006-01-04 07:12:21 +0000 |
|---|---|---|
| committer | Chris Lattner <sabre@nondot.org> | 2006-01-04 07:12:21 +0000 |
| commit | 227e936650d8958e4bd9b98b56233bf144ba48a5 (patch) | |
| tree | b0c33ef3042b08adb0852f43b31981dd053d7e15 /llvm/lib/CodeGen/MachineFunction.cpp | |
| parent | 7120107e207924a7220f845fd24230bbec6b6d7c (diff) | |
| download | llvm-227e936650d8958e4bd9b98b56233bf144ba48a5.zip llvm-227e936650d8958e4bd9b98b56233bf144ba48a5.tar.gz llvm-227e936650d8958e4bd9b98b56233bf144ba48a5.tar.bz2 | |
Add support for targets (like Alpha) that have terminator instructions which
use virtual registers. We now allow the first instruction in a block of
terminators to use virtual registers, and update phi elimination to correctly
update livevar when eliminating phi's. This fixes a problem on a testcase
Andrew sent me.
llvm-svn: 25083
Diffstat (limited to 'llvm/lib/CodeGen/MachineFunction.cpp')
0 files changed, 0 insertions, 0 deletions