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| author | Cullen Rhodes <cullen.rhodes@arm.com> | 2021-10-07 08:29:51 +0000 |
|---|---|---|
| committer | Cullen Rhodes <cullen.rhodes@arm.com> | 2021-10-07 08:55:11 +0000 |
| commit | 14cb138b15adafe7d4a1cd7cb2e836c40a5957b5 (patch) | |
| tree | a11a204cf5e2b46fb3c66078d6c05002afa6da3e /llvm/lib/CodeGen/MachineFunction.cpp | |
| parent | 42ba79b7b025c97c3aff2b958f18be90e70239f2 (diff) | |
| download | llvm-14cb138b15adafe7d4a1cd7cb2e836c40a5957b5.zip llvm-14cb138b15adafe7d4a1cd7cb2e836c40a5957b5.tar.gz llvm-14cb138b15adafe7d4a1cd7cb2e836c40a5957b5.tar.bz2 | |
[AArch64][SME] Update DUP (predicate) instruction
Changes in architecture revision 00eac1:
* Renamed to PSEL.
* Copies whole source register.
* Element type suffix removed from destination.
* Element index no longer optional and '#' prefix has been removed.
The reference can be found here:
https://developer.arm.com/documentation/ddi0602/2021-09
Depends on D111212.
Reviewed By: kmclaughlin
Differential Revision: https://reviews.llvm.org/D111213
Diffstat (limited to 'llvm/lib/CodeGen/MachineFunction.cpp')
0 files changed, 0 insertions, 0 deletions