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| author | Caroline Concatto <caroline.concatto@arm.com> | 2021-07-19 11:14:20 +0100 |
|---|---|---|
| committer | Caroline Concatto <caroline.concatto@arm.com> | 2021-07-26 11:45:46 +0100 |
| commit | 0bfc26e3a4bf291f1d64610fe422c82789d752bc (patch) | |
| tree | b380dd26e19c5149dc92fc7f08e24fe3f087aa79 /llvm/lib/CodeGen/MachineFunction.cpp | |
| parent | b2a5f0029f278dadb62f9e98dec12b1840020324 (diff) | |
| download | llvm-0bfc26e3a4bf291f1d64610fe422c82789d752bc.zip llvm-0bfc26e3a4bf291f1d64610fe422c82789d752bc.tar.gz llvm-0bfc26e3a4bf291f1d64610fe422c82789d752bc.tar.bz2 | |
[SVE][AArch64] Improve code generation for vector_splice for Imm > 0
This patch implements vector_splice in tablegen for all cases when the
Immediate is positive and lower than the known minimum value of
a scalable vector.
Vector_splice can be implemented using SVE instruction EXT.
For instance :
@llvm.experimental.vector.splice(Vector_1, Vector_2, Imm)
@llvm.experimental.vector.splice(<A,B,C,D>, <E,F,G,H>, 1) ==> <B, C, D, E>
EXT Vector_1, Vector_2, Imm // Vector_1 = B, C, D + Vector_2 = E
Depends on D105633
Differential Revision: https://reviews.llvm.org/D106273
Diffstat (limited to 'llvm/lib/CodeGen/MachineFunction.cpp')
0 files changed, 0 insertions, 0 deletions