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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2014-06-26 17:22:30 +0000 |
|---|---|---|
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2014-06-26 17:22:30 +0000 |
| commit | 0989d51520b054bdb48916103a8e2c205f8e3baf (patch) | |
| tree | a8e82dec7e645cd42df09fd20efef1d8a2ddc33d /llvm/lib/CodeGen/MachineFunction.cpp | |
| parent | 92a4d51fa6d9164b4e93a4522cb5e42e6f6d17bd (diff) | |
| download | llvm-0989d51520b054bdb48916103a8e2c205f8e3baf.zip llvm-0989d51520b054bdb48916103a8e2c205f8e3baf.tar.gz llvm-0989d51520b054bdb48916103a8e2c205f8e3baf.tar.bz2 | |
R600/SI: Add FP mode bits to binary.
The default rounding mode to initialize the mode register needs
to be reported to the runtime. Fill in other bits a kernel
may be interested in setting for future use.
llvm-svn: 211791
Diffstat (limited to 'llvm/lib/CodeGen/MachineFunction.cpp')
0 files changed, 0 insertions, 0 deletions