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| author | Jim Grosbach <grosbach@apple.com> | 2012-03-30 18:53:01 +0000 |
|---|---|---|
| committer | Jim Grosbach <grosbach@apple.com> | 2012-03-30 18:53:01 +0000 |
| commit | daa04130ed75e5c42a99bac91ac22306f9af8987 (patch) | |
| tree | 29e43c565b4dbf8e3595d4f5c926d475253add5a /llvm/lib/CodeGen/MachineDominators.cpp | |
| parent | 74005ae691e7e362c175be695fe46e5d4e760005 (diff) | |
| download | llvm-daa04130ed75e5c42a99bac91ac22306f9af8987.zip llvm-daa04130ed75e5c42a99bac91ac22306f9af8987.tar.gz llvm-daa04130ed75e5c42a99bac91ac22306f9af8987.tar.bz2 | |
ARM encoding for VSWP got the second operand incorrect.
Make the non-tied register operand names line up with what the base
class encoding handler expects.
rdar://11157236
llvm-svn: 153766
Diffstat (limited to 'llvm/lib/CodeGen/MachineDominators.cpp')
0 files changed, 0 insertions, 0 deletions