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| author | Misha Brukman <brukman+llvm@gmail.com> | 2003-05-27 22:37:00 +0000 |
|---|---|---|
| committer | Misha Brukman <brukman+llvm@gmail.com> | 2003-05-27 22:37:00 +0000 |
| commit | da83883ef1d316583a3eb58882a848247d46a3d5 (patch) | |
| tree | 3d7595d4382b7201dcf98a1a950c51293b8eb6b7 /llvm/lib/CodeGen/MachineCodeEmitter.cpp | |
| parent | 8bde6a688c2197363f52993061f0a900b1924b76 (diff) | |
| download | llvm-da83883ef1d316583a3eb58882a848247d46a3d5.zip llvm-da83883ef1d316583a3eb58882a848247d46a3d5.tar.gz llvm-da83883ef1d316583a3eb58882a848247d46a3d5.tar.bz2 | |
Added 'r' or 'i' annotations to instructions, as SparcInstr.def has changed.
Here I had to make one non-trivial change: add a function to get a version of
the opcode that takes an immediate, given an opcode that takes all registers.
This is required because sometimes it is not known at construction time which
opcode is used because opcodes are passed around between functions.
llvm-svn: 6375
Diffstat (limited to 'llvm/lib/CodeGen/MachineCodeEmitter.cpp')
0 files changed, 0 insertions, 0 deletions