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| author | David Sherwood <david.sherwood@arm.com> | 2022-06-21 17:00:40 +0100 |
|---|---|---|
| committer | David Sherwood <david.sherwood@arm.com> | 2022-06-28 10:25:06 +0100 |
| commit | 054faac9f95e8d93a4e0a088f69be7f72f71a469 (patch) | |
| tree | 8b0e0a7b19a74035d352a1926ab1b675aabc4458 /llvm/lib/CodeGen/MachineCheckDebugify.cpp | |
| parent | 7f5d7bc827a5fda1c803342af536f81986e2635a (diff) | |
| download | llvm-054faac9f95e8d93a4e0a088f69be7f72f71a469.zip llvm-054faac9f95e8d93a4e0a088f69be7f72f71a469.tar.gz llvm-054faac9f95e8d93a4e0a088f69be7f72f71a469.tar.bz2 | |
[AArch64][SME] Add SVE2 psel, uclamp, sclamp and revd IR intrinsics
When the SME feature is enabled we also gain access to a few extra
SVE2 instructions. This patch adds LLVM IR intrinsics to make use
of these new instructions:
@llvm.aarch64.sve.psel
@llvm.aarch64.sve.revd
@llvm.aarch64.sve.sclamp
@llvm.aarch64.sve.uclamp
Differential Revision: https://reviews.llvm.org/D128332
Diffstat (limited to 'llvm/lib/CodeGen/MachineCheckDebugify.cpp')
0 files changed, 0 insertions, 0 deletions