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authorEvan Cheng <evan.cheng@apple.com>2010-03-23 20:33:48 +0000
committerEvan Cheng <evan.cheng@apple.com>2010-03-23 20:33:48 +0000
commitc7d721aa03d87451e4caa61ff3ae21c62d3bed22 (patch)
tree273dd9a69256cbcdef15333dad54a6142c84511d /llvm/lib/CodeGen/MachineCSE.cpp
parent519675bbf5d67910de13c77c6cf2bee08b39b2aa (diff)
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Code clean up.
llvm-svn: 99319
Diffstat (limited to 'llvm/lib/CodeGen/MachineCSE.cpp')
-rw-r--r--llvm/lib/CodeGen/MachineCSE.cpp12
1 files changed, 6 insertions, 6 deletions
diff --git a/llvm/lib/CodeGen/MachineCSE.cpp b/llvm/lib/CodeGen/MachineCSE.cpp
index 91d3635..355acfc 100644
--- a/llvm/lib/CodeGen/MachineCSE.cpp
+++ b/llvm/lib/CodeGen/MachineCSE.cpp
@@ -117,17 +117,15 @@ bool MachineCSE::isPhysDefTriviallyDead(unsigned Reg,
MachineBasicBlock::const_iterator I,
MachineBasicBlock::const_iterator E) {
unsigned LookAheadLeft = 5;
- while (LookAheadLeft--) {
+ while (LookAheadLeft) {
if (I == E)
// Reached end of block, register is obviously dead.
return true;
- if (I->isDebugValue()) {
- // These must not count against the limit.
- ++LookAheadLeft;
+ // Skip over dbg_value's.
+ while (I->isDebugValue())
++I;
- continue;
- }
+
bool SeenDef = false;
for (unsigned i = 0, e = I->getNumOperands(); i != e; ++i) {
const MachineOperand &MO = I->getOperand(i);
@@ -143,6 +141,8 @@ bool MachineCSE::isPhysDefTriviallyDead(unsigned Reg,
// See a def of Reg (or an alias) before encountering any use, it's
// trivially dead.
return true;
+
+ --LookAheadLeft;
++I;
}
return false;