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| author | Michael Maitland <michaeltmaitland@gmail.com> | 2024-01-23 19:45:24 -0700 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2024-01-23 21:45:24 -0500 |
| commit | 63f742c15f01a25c60f0090a3aceb15bb8985e5e (patch) | |
| tree | 531fe75c537de03cbf3a17214324764c39881186 /llvm/lib/CodeGen/MachineCSE.cpp | |
| parent | 7bda0ce15a2874ad74fb1a451a174084094ccc34 (diff) | |
| download | llvm-63f742c15f01a25c60f0090a3aceb15bb8985e5e.zip llvm-63f742c15f01a25c60f0090a3aceb15bb8985e5e.tar.gz llvm-63f742c15f01a25c60f0090a3aceb15bb8985e5e.tar.bz2 | |
[RISCV] Add sifive-p670 processor (#79015)
This is an OOO core that has a vector unit. For more information see
https://www.sifive.com/cores/performance-p650-670.
Scheduler model and other tuning will come in separate patches.
Diffstat (limited to 'llvm/lib/CodeGen/MachineCSE.cpp')
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