aboutsummaryrefslogtreecommitdiff
path: root/llvm/lib/CodeGen/MachineCSE.cpp
diff options
context:
space:
mode:
authorMichael Kitzan <mkitzan@apple.com>2021-04-23 15:03:57 -0700
committerMichael Kitzan <mkitzan@apple.com>2021-04-23 16:44:48 -0700
commit59f2dd5f1acded46299cc8eee61a3af78036e140 (patch)
tree7fc007a27b84e8225add048742aef65c24281f98 /llvm/lib/CodeGen/MachineCSE.cpp
parentfc88d927e30de93bf75aef8cd2a835675fe904bc (diff)
downloadllvm-59f2dd5f1acded46299cc8eee61a3af78036e140.zip
llvm-59f2dd5f1acded46299cc8eee61a3af78036e140.tar.gz
llvm-59f2dd5f1acded46299cc8eee61a3af78036e140.tar.bz2
[MachineCSE] Prevent CSE of non-local convergent instrs
At the moment, MachineCSE allows CSE-ing convergent instrs which are non-local to each other. This can cause illegal codegen as convergent instrs are control flow dependent. The patch prevents non-local CSE of convergent instrs by adding a check in isProfitableToCSE and rejecting CSE-ing if we're considering CSE-ing non-local convergent instrs. We can still CSE convergent instrs which are in the same control flow scope, so the patch purposely does not make all convergent instrs non-CSE candidates in isCSECandidate. https://reviews.llvm.org/D101187
Diffstat (limited to 'llvm/lib/CodeGen/MachineCSE.cpp')
-rw-r--r--llvm/lib/CodeGen/MachineCSE.cpp6
1 files changed, 5 insertions, 1 deletions
diff --git a/llvm/lib/CodeGen/MachineCSE.cpp b/llvm/lib/CodeGen/MachineCSE.cpp
index 199fe2d..de90d0f 100644
--- a/llvm/lib/CodeGen/MachineCSE.cpp
+++ b/llvm/lib/CodeGen/MachineCSE.cpp
@@ -433,6 +433,11 @@ bool MachineCSE::isProfitableToCSE(Register CSReg, Register Reg,
MachineBasicBlock *CSBB, MachineInstr *MI) {
// FIXME: Heuristics that works around the lack the live range splitting.
+ MachineBasicBlock *BB = MI->getParent();
+ // Prevent CSE-ing non-local convergent instructions.
+ if (MI->isConvergent() && CSBB != BB)
+ return false;
+
// If CSReg is used at all uses of Reg, CSE should not increase register
// pressure of CSReg.
bool MayIncreasePressure = true;
@@ -455,7 +460,6 @@ bool MachineCSE::isProfitableToCSE(Register CSReg, Register Reg,
// an immediate predecessor. We don't want to increase register pressure and
// end up causing other computation to be spilled.
if (TII->isAsCheapAsAMove(*MI)) {
- MachineBasicBlock *BB = MI->getParent();
if (CSBB != BB && !CSBB->isSuccessor(BB))
return false;
}