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| author | Bjorn Pettersson <bjorn.a.pettersson@ericsson.com> | 2019-08-16 13:16:38 +0000 |
|---|---|---|
| committer | Bjorn Pettersson <bjorn.a.pettersson@ericsson.com> | 2019-08-16 13:16:38 +0000 |
| commit | 6a75061e36fe1998e51ba9de2702f756b6ad5a8e (patch) | |
| tree | 197b54a2436e082f5e53bbc48fe52d14edb5925c /llvm/lib/CodeGen/MachineBlockPlacement.cpp | |
| parent | 8c2c5f5045b7a91c2a69fe232a11ce8bec9a5744 (diff) | |
| download | llvm-6a75061e36fe1998e51ba9de2702f756b6ad5a8e.zip llvm-6a75061e36fe1998e51ba9de2702f756b6ad5a8e.tar.gz llvm-6a75061e36fe1998e51ba9de2702f756b6ad5a8e.tar.bz2 | |
[X86] Add test case for future MULFIX DAG combine folds. NFC
Add some test cases displaying the lack of DAG combine
folds for SMULFIX/UMULFIX/SMULFIXSAT when either
multiplicand is undef or zero.
It seems like widening vector legalization for X86 can
introduce fixed point multiplication of undef values.
So that is one way that such operations could appear
during ISel.
Multiplication with zero is probably more unlikely, and
could potentially be handled by InstCombine. But I do
not think it would hurt to do such folds in DAGCombiner.
This patch only adds the test case. The folds will be
added in a follow up patch.
llvm-svn: 369102
Diffstat (limited to 'llvm/lib/CodeGen/MachineBlockPlacement.cpp')
0 files changed, 0 insertions, 0 deletions