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| author | Juergen Ributzka <juergen@apple.com> | 2014-06-25 20:06:12 +0000 |
|---|---|---|
| committer | Juergen Ributzka <juergen@apple.com> | 2014-06-25 20:06:12 +0000 |
| commit | 296833cde9c68cb143690d654aa515009ed5634c (patch) | |
| tree | 339854b1be4fb577b17193c95261d14a1e7fc46e /llvm/lib/CodeGen/MachineBlockPlacement.cpp | |
| parent | cfcd7914da9ce15a8b88ab8ee318db3c7d7d1ff3 (diff) | |
| download | llvm-296833cde9c68cb143690d654aa515009ed5634c.zip llvm-296833cde9c68cb143690d654aa515009ed5634c.tar.gz llvm-296833cde9c68cb143690d654aa515009ed5634c.tar.bz2 | |
[FastISel][X86] Only fold the cmp into the select when both instructions are in the same basic block.
If the cmp is in a different basic block, then it is possible that not all
operands of that compare have defined registers. This can happen when one of
the operands to the cmp is a load and the load gets folded into the cmp. In
this case FastISel will skip the load instruction and the vreg is never
defined.
llvm-svn: 211730
Diffstat (limited to 'llvm/lib/CodeGen/MachineBlockPlacement.cpp')
0 files changed, 0 insertions, 0 deletions