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| author | Danilo Carvalho Grael <danilo.carvalho.grael@huawei.com> | 2020-02-21 11:59:52 -0500 |
|---|---|---|
| committer | Danilo Carvalho Grael <danilo.carvalho.grael@huawei.com> | 2020-02-21 12:15:51 -0500 |
| commit | db9c40f5624e6d55e0cbafe3f3980a7223e197c4 (patch) | |
| tree | 50132171943121e69b04921f755b7077b6ef9a43 /llvm/lib/CodeGen/MachineBlockFrequencyInfo.cpp | |
| parent | fc4455891c00bfa16c85d0cebe6158fafe11667d (diff) | |
| download | llvm-db9c40f5624e6d55e0cbafe3f3980a7223e197c4.zip llvm-db9c40f5624e6d55e0cbafe3f3980a7223e197c4.tar.gz llvm-db9c40f5624e6d55e0cbafe3f3980a7223e197c4.tar.bz2 | |
[AArch64][SVE] Add intrinsics for SVE2 bitwise ternary operations
Summary:
Add intrinsics for the following operations:
- eor3, bcax
- bsl, bsl1n, bsl2n, nbsl
Fix MC tests for bsl instructions.
Reviewers: kmclaughlin, c-rhodes, sdesmalen, efriedma, rengolin
Reviewed By: efriedma
Subscribers: tschuett, kristof.beyls, hiraditya, rkruppe, psnobl, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D74785
Diffstat (limited to 'llvm/lib/CodeGen/MachineBlockFrequencyInfo.cpp')
0 files changed, 0 insertions, 0 deletions