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| author | Tilmann Scheller <tilmann.scheller@googlemail.com> | 2013-07-03 20:38:01 +0000 |
|---|---|---|
| committer | Tilmann Scheller <tilmann.scheller@googlemail.com> | 2013-07-03 20:38:01 +0000 |
| commit | ef5666fbbfcdb855a24899c15b498fdf57158f74 (patch) | |
| tree | 6e89f0c42077a9cb73b24dd07c0ff181d605219a /llvm/lib/CodeGen/MachineBasicBlock.cpp | |
| parent | 7ed67722e5bd40d3448a1f603548d43c4744fed9 (diff) | |
| download | llvm-ef5666fbbfcdb855a24899c15b498fdf57158f74.zip llvm-ef5666fbbfcdb855a24899c15b498fdf57158f74.tar.gz llvm-ef5666fbbfcdb855a24899c15b498fdf57158f74.tar.bz2 | |
ARM: Prevent ARMAsmParser::shouldOmitCCOutOperand() from misidentifying certain Thumb2 add immediate T3 encodings.
Before the fix Thumb2 instructions of type "add rD, rN, #imm" (T3 encoding, see ARM ARM A8.8.4) with rD and rN both being low registers (r0-r7) were classified as having the T4 encoding.
The T4 encoding doesn't have a cc_out operand so for above instructions the operand gets erroneously removed, corrupting the token stream and leading to parse errors later in the process.
This bug prevented "add r1, r7, #0xcbcbcbcb" from being assembled correctly.
Fixes <rdar://problem/14224440>.
llvm-svn: 185575
Diffstat (limited to 'llvm/lib/CodeGen/MachineBasicBlock.cpp')
0 files changed, 0 insertions, 0 deletions