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| author | Sameer Sahasrabuddhe <sameer.sahasrabuddhe@amd.com> | 2023-08-18 13:48:01 +0530 |
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| committer | Sameer Sahasrabuddhe <sameer.sahasrabuddhe@amd.com> | 2023-08-20 21:14:46 +0530 |
| commit | ef38e6d97f482284262172491b6c13b1b9db95b4 (patch) | |
| tree | 1094aa86c2cbcefa42567eb96bb9d0e8185ce8ab /llvm/lib/CodeGen/MachineBasicBlock.cpp | |
| parent | d6a1388d6fba33da1e3a99589d5f26cfb2cf4d23 (diff) | |
| download | llvm-ef38e6d97f482284262172491b6c13b1b9db95b4.zip llvm-ef38e6d97f482284262172491b6c13b1b9db95b4.tar.gz llvm-ef38e6d97f482284262172491b6c13b1b9db95b4.tar.bz2 | |
[GlobalISel] introduce MIFlag::NoConvergent
Some opcodes in MIR are defined to be convergent by the target by setting
IsConvergent in the corresponding TD file. For example, in AMDGPU, the opcodes
G_SI_CALL and G_INTRINSIC* are marked as convergent. But this is too
conservative, since calls to functions that do not execute convergent operations
should not be marked convergent. This information is available in LLVM IR.
The new flag MIFlag::NoConvergent now allows the IR translator to mark an
instruction as not performing any convergent operations. It is relevant only on
occurrences of opcodes that are marked isConvergent in the target.
Differential Revision: https://reviews.llvm.org/D157475
Diffstat (limited to 'llvm/lib/CodeGen/MachineBasicBlock.cpp')
0 files changed, 0 insertions, 0 deletions