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| author | Elvis Wang <elvis.wang@sifive.com> | 2025-08-21 07:39:01 +0800 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2025-08-21 07:39:01 +0800 |
| commit | d611a9ca1527031d45db9e098cdec286aca163f8 (patch) | |
| tree | 31a5102b3a81d38f02b0af2168abac8dfff3444f /llvm/lib/CodeGen/MachineBasicBlock.cpp | |
| parent | cf0e86118deba0b8b2fb1645412ecb2a3cf1a55e (diff) | |
| download | llvm-d611a9ca1527031d45db9e098cdec286aca163f8.zip llvm-d611a9ca1527031d45db9e098cdec286aca163f8.tar.gz llvm-d611a9ca1527031d45db9e098cdec286aca163f8.tar.bz2 | |
[LV][VPlan] Reduce register usage of VPEVLBasedIVPHIRecipe. (#154482)
`VPEVLBasedIVPHIRecipe` will lower to VPInstruction scalar phi and
generate scalar phi. This recipe will only occupy a scalar register just
like other phi recipes.
This patch fix the register usage for `VPEVLBasedIVPHIRecipe` from
vector
to scalar which is close to generated vector IR.
https://godbolt.org/z/6Mzd6W6ha shows that no register spills when
choosing `<vscale x 16>`.
Note that this test is basically copied from AArch64.
Diffstat (limited to 'llvm/lib/CodeGen/MachineBasicBlock.cpp')
0 files changed, 0 insertions, 0 deletions