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| author | Petar Jovanovic <petar.jovanovic@imgtec.com> | 2017-03-31 14:31:55 +0000 |
|---|---|---|
| committer | Petar Jovanovic <petar.jovanovic@imgtec.com> | 2017-03-31 14:31:55 +0000 |
| commit | 9bff3b78186c09027126606d408712d3b1a31c52 (patch) | |
| tree | 69570a873c094a0e060602c7646bd061228f38eb /llvm/lib/CodeGen/MachineBasicBlock.cpp | |
| parent | a11dbf2c90e0a4926e5ac3d0799be4603e15ae32 (diff) | |
| download | llvm-9bff3b78186c09027126606d408712d3b1a31c52.zip llvm-9bff3b78186c09027126606d408712d3b1a31c52.tar.gz llvm-9bff3b78186c09027126606d408712d3b1a31c52.tar.bz2 | |
[mips][msa] Prevent output operand from commuting for dpadd_[su].df ins
Implementation of TargetInstrInfo::findCommutedOpIndices for MIPS target,
restricting commutativity to second and third operand only for
dpaadd_[su].df instructions therein.
Prior to this change, there were cases where the vector that is to be added
to the dot product of the other two could take a position other than the
first one in the instruction, generating false output in the destination
vector.
Such behavior has been noticed in the two functions generating v2i64 output
values so far. Other ones may exhibit such behavior as well, just not for
the vector operands which are present in the test at the moment.
Tests altered so that the function's first operand is a constant splat so
that it can be loaded with a ldi instruction, since that is the case in
which the erroneous instruction operand placement has occurred. We check
that the register which is present in the ldi instruction is placed as the
first operand in the corresponding dpadd instruction.
Patch by Stefan Maksimovic.
Differential Revision: https://reviews.llvm.org/D30827
llvm-svn: 299223
Diffstat (limited to 'llvm/lib/CodeGen/MachineBasicBlock.cpp')
0 files changed, 0 insertions, 0 deletions