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| author | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2012-09-06 18:15:23 +0000 |
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| committer | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2012-09-06 18:15:23 +0000 |
| commit | 866908c42c80aae8ad2740763e8303d18de8ee19 (patch) | |
| tree | 5a49a73f1c298618dfc427214b9a28dd11e1bae1 /llvm/lib/CodeGen/MachineBasicBlock.cpp | |
| parent | bb4bdd89122761b95f75f118acdada663c94f232 (diff) | |
| download | llvm-866908c42c80aae8ad2740763e8303d18de8ee19.zip llvm-866908c42c80aae8ad2740763e8303d18de8ee19.tar.gz llvm-866908c42c80aae8ad2740763e8303d18de8ee19.tar.bz2 | |
Allow overlaps between virtreg and physreg live ranges.
The RegisterCoalescer understands overlapping live ranges where one
register is defined as a copy of the other. With this change, register
allocators using LiveRegMatrix can do the same, at least for copies
between physical and virtual registers.
When a physreg is defined by a copy from a virtreg, allow those live
ranges to overlap:
%CL<def> = COPY %vreg11:sub_8bit; GR32_ABCD:%vreg11
%vreg13<def,tied1> = SAR32rCL %vreg13<tied0>, %CL<imp-use,kill>
We can assign %vreg11 to %ECX, overlapping the live range of %CL.
llvm-svn: 163336
Diffstat (limited to 'llvm/lib/CodeGen/MachineBasicBlock.cpp')
0 files changed, 0 insertions, 0 deletions