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| author | Craig Topper <craig.topper@sifive.com> | 2021-01-09 19:56:57 -0800 |
|---|---|---|
| committer | Craig Topper <craig.topper@sifive.com> | 2021-01-09 20:22:07 -0800 |
| commit | 6fc7a92eeeb5c47754b875bf6cf1b84687ebe693 (patch) | |
| tree | 9d4581105f6a05c302bb1abd60edf1a5ee7fbeda /llvm/lib/CodeGen/MachineBasicBlock.cpp | |
| parent | 59908fc06ace351dad0b82b38c793f7b92ab4530 (diff) | |
| download | llvm-6fc7a92eeeb5c47754b875bf6cf1b84687ebe693.zip llvm-6fc7a92eeeb5c47754b875bf6cf1b84687ebe693.tar.gz llvm-6fc7a92eeeb5c47754b875bf6cf1b84687ebe693.tar.bz2 | |
[RISCV] Change ConstraintMask in RISCVII enum to be shifted left. NFC
This makes the mask align with the position of the bits in TSFlags
which is a little more logical.
I might be adding more fields to TSFlags and some might be single
bits where just ANDing with mask to test the bit would make sense.
While there rename TargetFlags in validateInstruction to reflect
that it's just the constraint bits.
Diffstat (limited to 'llvm/lib/CodeGen/MachineBasicBlock.cpp')
0 files changed, 0 insertions, 0 deletions