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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2024-12-13 11:52:11 +0900 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2024-12-13 11:52:11 +0900 |
| commit | 5e53a8dadb0019ee87936c1278fa222781257005 (patch) | |
| tree | c65112db8f8b96b5ee337f366de2c597fefd5ca1 /llvm/lib/CodeGen/MachineBasicBlock.cpp | |
| parent | 3b10e31d3a4a1c660c82287d3b9f6515f37a32ca (diff) | |
| download | llvm-5e53a8dadb0019ee87936c1278fa222781257005.zip llvm-5e53a8dadb0019ee87936c1278fa222781257005.tar.gz llvm-5e53a8dadb0019ee87936c1278fa222781257005.tar.bz2 | |
AMDGPU: Fix verifier assert with out of bounds subregister indexes (#119799)
The manual check for aligned VGPR classes would assert if a virtual
register used an index not supported by the register class.
Diffstat (limited to 'llvm/lib/CodeGen/MachineBasicBlock.cpp')
0 files changed, 0 insertions, 0 deletions