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| author | Hugo Trachino <hugo.trachino@huawei.com> | 2024-06-20 10:43:23 +0100 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2024-06-20 10:43:23 +0100 |
| commit | 2c06fb899966b49ff0fe4adf55fceb7d1941fbca (patch) | |
| tree | 3eaebcd131b0263992383472a7d566d28c576916 /llvm/lib/CodeGen/MachineBasicBlock.cpp | |
| parent | 1002c08c646d8c85fb63a54140a00c642f317b28 (diff) | |
| download | llvm-2c06fb899966b49ff0fe4adf55fceb7d1941fbca.zip llvm-2c06fb899966b49ff0fe4adf55fceb7d1941fbca.tar.gz llvm-2c06fb899966b49ff0fe4adf55fceb7d1941fbca.tar.bz2 | |
[MLIR][Vector] Generalize DropUnitDimFromElementwiseOps to non leading / trailing dimensions. (#92934)
Generalizes `DropUnitDimFromElementwiseOps` to support inner unit
dimensions.
This change stems from improving lowering of contractionOps for Arm SME.
Where we end up with inner unit dimensions on MulOp, BroadcastOp and
TransposeOp, preventing the generation of outerproducts.
discussed
[here](https://discourse.llvm.org/t/on-improving-arm-sme-lowering-resilience-in-mlir/78543/17?u=nujaa).
---------
Co-authored-by: Benjamin Maxwell <macdue@dueutil.tech>
Diffstat (limited to 'llvm/lib/CodeGen/MachineBasicBlock.cpp')
0 files changed, 0 insertions, 0 deletions