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authorOliver Stannard <oliver.stannard@arm.com>2024-12-06 09:46:56 +0100
committerGitHub <noreply@github.com>2024-12-06 08:46:56 +0000
commitf893b475004fdea48288f329124817325e659792 (patch)
treeac01861b4f0c13fd613836c6721cf6eb4da16460 /llvm/lib/CodeGen/LiveDebugVariables.cpp
parentefe4bfa623d40f8221f449c3dd38392101a53599 (diff)
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[ARM] Fix instruction selection for MVE vsbciq intrinsic (#118284)
There were two bugs in the implementation of the MVE vsbciq (subtract with carry across vector, with initial carry value) intrinsics: * The VSBCI instruction behaves as if the carry-in is always set, but we were selecting it when the carry-in is clear. * The vsbciq intrinsics should generate IR with the carry-in set, but they were leaving it clear. These two bugs almost cancelled each other out, but resulted in incorrect code when the vsbcq intrinsics (with a carry-in) were used, and the carry-in was a compile time constant.
Diffstat (limited to 'llvm/lib/CodeGen/LiveDebugVariables.cpp')
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