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author | Craig Topper <craig.topper@intel.com> | 2019-02-23 00:34:58 +0000 |
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committer | Craig Topper <craig.topper@intel.com> | 2019-02-23 00:34:58 +0000 |
commit | b95ca5636141de7c307fee402c86c8e46d3160e7 (patch) | |
tree | b07c8b778cb62d9422f6b2663b2b59a3a6b2e6b7 /llvm/lib/CodeGen/LiveDebugVariables.cpp | |
parent | 5945ad5c430d8847c77509010cf8a89c7f877f3e (diff) | |
download | llvm-b95ca5636141de7c307fee402c86c8e46d3160e7.zip llvm-b95ca5636141de7c307fee402c86c8e46d3160e7.tar.gz llvm-b95ca5636141de7c307fee402c86c8e46d3160e7.tar.bz2 |
[X86] Add a few test cases for a v8i64 sext/zext from an illegal type that needs to be promoted to 128 bits.
If v8i64 isn't a legal type but v4i64 is, these will be split and then each half will get their input promoted and become an any_extend_vector_inreg/punpckhwd + any_extend + and/sign_extend_inreg.
If we instead recognize the input will be promoted we can emit the and/sign_extend_inreg first in a 128 bit register. Then we can sign_extend/zero_extend one half and pshufd+sign_extend/zero_extend the other half.
llvm-svn: 354708
Diffstat (limited to 'llvm/lib/CodeGen/LiveDebugVariables.cpp')
0 files changed, 0 insertions, 0 deletions