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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2020-04-08 10:57:11 -0400 |
|---|---|---|
| committer | Matt Arsenault <arsenm2@gmail.com> | 2020-04-08 12:10:58 -0400 |
| commit | dcce3ef1d2a69d0f4162d1e85abcfc9c28d0152e (patch) | |
| tree | 76bb21f045051947ae9ca0715dbc71122eb5f6ec /llvm/lib/CodeGen/InterferenceCache.cpp | |
| parent | 7a46e36d518868fd77518c9e0dc13786ffb969c5 (diff) | |
| download | llvm-dcce3ef1d2a69d0f4162d1e85abcfc9c28d0152e.zip llvm-dcce3ef1d2a69d0f4162d1e85abcfc9c28d0152e.tar.gz llvm-dcce3ef1d2a69d0f4162d1e85abcfc9c28d0152e.tar.bz2 | |
FastISel: Partially use Register
Doesn't try to convert the cases that depend on generated code.
Diffstat (limited to 'llvm/lib/CodeGen/InterferenceCache.cpp')
0 files changed, 0 insertions, 0 deletions